MultiStandard Decoder for DVB-C2, DVB-T2 and DVB-S2
Description
Ubiso DVB-x2 IP is a highly optimized multi-standard DVB-T2/C2/S2 Decoder solution designed by Ubiso for next generation satellite, cable and terrestrial digital television reception.
Ubiso DVB-x2 IP converts demodulated I/Q signals into a bit stream for use by the video decoder. This includes all de-interleaving, FEC decoding and output processing.
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Product Brief

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Key Features
- All DVB-T2, DVB-C2 and DVB-S2 modes
- Dedicated DVB-T2, -C2 and -S2 Pre-Processing with Resource Sharing
- Optimized high performance FEC engine
- Single LDPC/BCH Decoder shared for all modes
- FEC engine parameters optimized for target throughput / application
- DVB-T2 L1-pre & L1-post Decoding
- DVB-C2 PLH & L1 Decoding
- DVB-S2 PLH Decoding
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- Output Processing
- TS / GSE / GFPS / GCS output
- De-Jitter Buffering and PLP Re-combination into single output stream
- Standard AHB Interfaces for Host control and Memory Access
- Timing-critical tightly-coupled memories embedded in IP
- Large non-timing-critical memories external to IP
- Optimized compile options targeted for ASIC and FPGA applications
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Ubiso DVB-x2 IP in a DVB-T2/C2/S2 receiver (either iDTV or set-top box) application:

Block Diagram of DVB-x2 IP:

Contact us for more information
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